Methods for FPGA pre-processing of data for the ALOFT readout system
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- Master theses 
In 2017 the Airborne Lightning Observatory for FEGS & TGFs (ALOFT) campaign was completed with the goal of studying thundercloud related high energy phenomena, namely Terrestrial Gamma-Ray Flashes (TGFs) and Gamma-ray Glows, and their connections. This was done on a high-altitude airplane flying over the thunderclouds. The campaign observed two gamma-ray glows but no TGFs. A new ALOFT campaign has been confirmed for 2023 and will contain several upgrades and improvements. Some of these improvements includes developing two new detectors that will be added to the instrument, as well as a new readout system based around a ZYNQ-7000 series System on Chip (SoC). Through this thesis, my contribution to this development has been two-folded: 1. Verify that the integrated ZYNQ Serial Peripheral Interface (SPI) controller can be used to interface and configure the Analog to Digital Converters (ADCs) in the new detectors. This involves a) making a converter between the four wire SPI used by the ZYNQ and the three wire SPI used by the ADCs, b) modelling the behaviour of how the ADCs control registers communicate, and c) verify if the ZYNQ SPI controller can transmit the protocols required to configure the ADCs, and that it can access the FPGA part of the ZYNQ SoC. 2. During TGFs the data output of the new detectors far exceeds the ability of the system to send all the raw data to storage, requiring the data to be temporarily buffered. The buffer capacity needed to guarantee that no data is lost, would consume 73% of the total shared buffer capacity available to the FPGA part of the system. This leaves very little available capacity for the remaining detectors and any FPGA modules. In this thesis different approaches to reduce the required buffer requirements has been explored. My work in this thesis shows that: 1. The ZYNQ SPI controller can be used to configure the ADCs by a) showing that the required converter can easily be made in the FPGA part of the ZYNQ, by b) modelling how the ADCs are configured can be created, and by c) testing that the ZYNQ SPI controller is compatible with the protocols used to interact and configure the ADCs. 2. After exploring both real-time analysis of the data on the SoC and compressing the raw data, the safest methods to use is compression. It is also shown that with the compression explored and considered, it is no problem reducing the buffer requirement from 73% to less than 30% of the total shared capacity.