Design of a 60 GHz Low Noise Amplifier in a 0.13 µm SiGe BiCMOS Process

Abstract

The Large Hadron Collider (LHC) in CERN outside Geneva in Switzerland is scheduled for an upgrade to improve the luminosity. This upgrade will require higher granularity for the triggering system, increasing the need for very high bandwidth data transfer. This thesis is a part of a feasibility study at the University of Heidelberg regarding the possibilities of using wireless data transfer in the 60 GHz band for data readout on the trigger system. In order to realize 60 GHz data transfer, a fully functional transceiver operating at 60 GHz must be developed. This work covers the design and realization of a low noise amplifier for use in this system. In order to obtain the required design knowledge, a comprehensive study of microwave theory is performed. This theory forms the basis for designing a low noise amplifier operating at very high frequencies. A summary of the most important theory is also included in this thesis. A low noise amplifier for use in a 60 GHz transceiver is designed and simulated using National Instruments Microwave Office. Simultaneous impedance- and noise matching is used in order to realize both low noise and low return loss at the same time. The amplifier is designed in a 0.13 µm SiGe BiCMOS process and a layout measuring 0.13 square millimeters is proposed. The resulting low noise amplifier has 9.5 GHz bandwidth, 4.3 dB noise figure, 20.4 dB gain and 9.8 mW power consumption and is within all given specifications. Although the results only show simulated response, we have good reason to believe that these results can be realized by performing a thorough EM simulation and process variation simulation. If this is the case, the resulting amplifier will be very competitive to previously published low noise amplifiers.